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<title>DM-CtrlH7-BF-DevProgram: C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_pwr.h Source File</title>
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<div class="header">
  <div class="headertitle"><div class="title">stm32h7xx_hal_pwr.h</div></div>
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<div class="contents">
<a href="stm32h7xx__hal__pwr_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno">    1</span></div>
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno">   18</span> </div>
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno">   19</span><span class="comment">/* Define to prevent recursive inclusion -------------------------------------*/</span></div>
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno">   20</span><span class="preprocessor">#ifndef STM32H7xx_HAL_PWR_H</span></div>
<div class="line"><a id="l00021" name="l00021"></a><span class="lineno">   21</span><span class="preprocessor">#define STM32H7xx_HAL_PWR_H</span></div>
<div class="line"><a id="l00022" name="l00022"></a><span class="lineno">   22</span> </div>
<div class="line"><a id="l00023" name="l00023"></a><span class="lineno">   23</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00024" name="l00024"></a><span class="lineno">   24</span> <span class="keyword">extern</span> <span class="stringliteral">&quot;C&quot;</span> {</div>
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno">   25</span><span class="preprocessor">#endif </span><span class="comment">/* __cplusplus */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00026" name="l00026"></a><span class="lineno">   26</span> </div>
<div class="line"><a id="l00027" name="l00027"></a><span class="lineno">   27</span><span class="comment">/* Includes ------------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00028" name="l00028"></a><span class="lineno">   28</span><span class="preprocessor">#include &quot;<a class="code" href="stm32h7xx__hal__def_8h.html">stm32h7xx_hal_def.h</a>&quot;</span></div>
<div class="line"><a id="l00029" name="l00029"></a><span class="lineno">   29</span></div>
<div class="line"><a id="l00033" name="l00033"></a><span class="lineno">   33</span></div>
<div class="line"><a id="l00037" name="l00037"></a><span class="lineno">   37</span> </div>
<div class="line"><a id="l00038" name="l00038"></a><span class="lineno">   38</span><span class="comment">/* Exported types ------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno">   39</span></div>
<div class="line"><a id="l00043" name="l00043"></a><span class="lineno">   43</span></div>
<div class="foldopen" id="foldopen00047" data-start="{" data-end="};">
<div class="line"><a id="l00047" name="l00047"></a><span class="lineno"><a class="line" href="struct_p_w_r___p_v_d_type_def.html">   47</a></span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l00048" name="l00048"></a><span class="lineno">   48</span>{</div>
<div class="line"><a id="l00049" name="l00049"></a><span class="lineno"><a class="line" href="struct_p_w_r___p_v_d_type_def.html#a540471bc6ac947fd8bc2c87f61d9faab">   49</a></span>  uint32_t <a class="code hl_variable" href="struct_p_w_r___p_v_d_type_def.html#a540471bc6ac947fd8bc2c87f61d9faab">PVDLevel</a>; </div>
<div class="line"><a id="l00053" name="l00053"></a><span class="lineno">   53</span> </div>
<div class="line"><a id="l00054" name="l00054"></a><span class="lineno"><a class="line" href="struct_p_w_r___p_v_d_type_def.html#af692d691f0cb5871b319fd371fab34d8">   54</a></span>  uint32_t <a class="code hl_variable" href="struct_p_w_r___p_v_d_type_def.html#af692d691f0cb5871b319fd371fab34d8">Mode</a>;     </div>
<div class="line"><a id="l00058" name="l00058"></a><span class="lineno">   58</span>}<a class="code hl_struct" href="struct_p_w_r___p_v_d_type_def.html">PWR_PVDTypeDef</a>;</div>
</div>
<div class="line"><a id="l00059" name="l00059"></a><span class="lineno">   59</span></div>
<div class="line"><a id="l00063" name="l00063"></a><span class="lineno">   63</span> </div>
<div class="line"><a id="l00064" name="l00064"></a><span class="lineno">   64</span><span class="comment">/* Exported constants --------------------------------------------------------*/</span></div>
<div class="line"><a id="l00068" name="l00068"></a><span class="lineno">   68</span></div>
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d__detection__level.html#gaddf4616a143ac3481f3043f2a4c21c18">   72</a></span><span class="preprocessor">#define PWR_PVDLEVEL_0  PWR_CR1_PLS_LEV0  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00074" name="l00074"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d__detection__level.html#ga06e55b20a8777594f1a91ee71fac1f79">   74</a></span><span class="preprocessor">#define PWR_PVDLEVEL_1  PWR_CR1_PLS_LEV1  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00076" name="l00076"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d__detection__level.html#gab26bb78650bbaef26ac9f9123c791cc7">   76</a></span><span class="preprocessor">#define PWR_PVDLEVEL_2  PWR_CR1_PLS_LEV2  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00078" name="l00078"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d__detection__level.html#ga7b751743b3e29c237e6a0e1d7bdd0503">   78</a></span><span class="preprocessor">#define PWR_PVDLEVEL_3  PWR_CR1_PLS_LEV3  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d__detection__level.html#ga03c0d3ae547deb1a51b8acafac101698">   80</a></span><span class="preprocessor">#define PWR_PVDLEVEL_4  PWR_CR1_PLS_LEV4  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d__detection__level.html#ga46a1476440945c2b6426b4973172f24b">   82</a></span><span class="preprocessor">#define PWR_PVDLEVEL_5  PWR_CR1_PLS_LEV5  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d__detection__level.html#ga5dda7d0ac3fd3d606666455ca3c8f537">   84</a></span><span class="preprocessor">#define PWR_PVDLEVEL_6  PWR_CR1_PLS_LEV6  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00086" name="l00086"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d__detection__level.html#ga2c5cd8dd26b13bdf0164c1f7596b4bfd">   86</a></span><span class="preprocessor">#define PWR_PVDLEVEL_7  PWR_CR1_PLS_LEV7  </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00091" name="l00091"></a><span class="lineno">   91</span></div>
<div class="line"><a id="l00095" name="l00095"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d___mode.html#ga3a4bf701a36a14a4edf4dc5a28153277">   95</a></span><span class="preprocessor">#define PWR_PVD_MODE_NORMAL               (0x00000000U) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00096" name="l00096"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d___mode.html#ga102d7b8354419990a2a780f61cd020a6">   96</a></span><span class="preprocessor">#define PWR_PVD_MODE_IT_RISING            (0x00010001U) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00097" name="l00097"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d___mode.html#gab600a54f3a588de836cfe4b727ab8a53">   97</a></span><span class="preprocessor">#define PWR_PVD_MODE_IT_FALLING           (0x00010002U) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00098" name="l00098"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d___mode.html#gac531fbf14457e6595505354fad521b67">   98</a></span><span class="preprocessor">#define PWR_PVD_MODE_IT_RISING_FALLING    (0x00010003U) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00099" name="l00099"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d___mode.html#ga1a946b01887aa886de329a92c3ab0dd4">   99</a></span><span class="preprocessor">#define PWR_PVD_MODE_EVENT_RISING         (0x00020001U) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00100" name="l00100"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d___mode.html#gaaedbe45f1a1ea6c30af6ac51abae0cae">  100</a></span><span class="preprocessor">#define PWR_PVD_MODE_EVENT_FALLING        (0x00020002U) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00101" name="l00101"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d___mode.html#ga7455387c8e9049f9f66b46423d4f4091">  101</a></span><span class="preprocessor">#define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003U) </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno">  105</span></div>
<div class="line"><a id="l00109" name="l00109"></a><span class="lineno">  109</span><span class="preprocessor">#define PWR_MAINREGULATOR_ON      (0U)</span></div>
<div class="line"><a id="l00110" name="l00110"></a><span class="lineno">  110</span><span class="preprocessor">#define PWR_LOWPOWERREGULATOR_ON  PWR_CR1_LPDS</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00114" name="l00114"></a><span class="lineno">  114</span></div>
<div class="line"><a id="l00118" name="l00118"></a><span class="lineno">  118</span><span class="preprocessor">#define PWR_SLEEPENTRY_WFI  (0x01U)</span></div>
<div class="line"><a id="l00119" name="l00119"></a><span class="lineno">  119</span><span class="preprocessor">#define PWR_SLEEPENTRY_WFE  (0x02U)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno">  123</span></div>
<div class="line"><a id="l00127" name="l00127"></a><span class="lineno">  127</span><span class="preprocessor">#define PWR_STOPENTRY_WFI  (0x01U)</span></div>
<div class="line"><a id="l00128" name="l00128"></a><span class="lineno">  128</span><span class="preprocessor">#define PWR_STOPENTRY_WFE  (0x02U)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00132" name="l00132"></a><span class="lineno">  132</span></div>
<div class="line"><a id="l00136" name="l00136"></a><span class="lineno">  136</span><span class="preprocessor">#if defined(PWR_SRDCR_VOS)</span></div>
<div class="line"><a id="l00137" name="l00137"></a><span class="lineno">  137</span><span class="preprocessor">#define PWR_REGULATOR_VOLTAGE_SCALE0  (PWR_SRDCR_VOS_1 | PWR_SRDCR_VOS_0)</span></div>
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno">  138</span><span class="preprocessor">#define PWR_REGULATOR_VOLTAGE_SCALE1  (PWR_SRDCR_VOS_1)</span></div>
<div class="line"><a id="l00139" name="l00139"></a><span class="lineno">  139</span><span class="preprocessor">#define PWR_REGULATOR_VOLTAGE_SCALE2  (PWR_SRDCR_VOS_0)</span></div>
<div class="line"><a id="l00140" name="l00140"></a><span class="lineno">  140</span><span class="preprocessor">#define PWR_REGULATOR_VOLTAGE_SCALE3  (0U)</span></div>
<div class="line"><a id="l00141" name="l00141"></a><span class="lineno">  141</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno">  142</span><span class="preprocessor">#define PWR_REGULATOR_VOLTAGE_SCALE0  (0U)</span></div>
<div class="line"><a id="l00143" name="l00143"></a><span class="lineno">  143</span><span class="preprocessor">#define PWR_REGULATOR_VOLTAGE_SCALE1  (PWR_D3CR_VOS_1 | PWR_D3CR_VOS_0)</span></div>
<div class="line"><a id="l00144" name="l00144"></a><span class="lineno">  144</span><span class="preprocessor">#define PWR_REGULATOR_VOLTAGE_SCALE2  (PWR_D3CR_VOS_1)</span></div>
<div class="line"><a id="l00145" name="l00145"></a><span class="lineno">  145</span><span class="preprocessor">#define PWR_REGULATOR_VOLTAGE_SCALE3  (PWR_D3CR_VOS_0)</span></div>
<div class="line"><a id="l00146" name="l00146"></a><span class="lineno">  146</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_SRDCR_VOS */</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00150" name="l00150"></a><span class="lineno">  150</span></div>
<div class="line"><a id="l00154" name="l00154"></a><span class="lineno">  154</span><span class="comment">/* PWR CPU flag */</span></div>
<div class="line"><a id="l00155" name="l00155"></a><span class="lineno">  155</span><span class="preprocessor">#define PWR_FLAG_STOP       (0x01U)</span></div>
<div class="line"><a id="l00156" name="l00156"></a><span class="lineno">  156</span><span class="preprocessor">#if defined (PWR_CPUCR_SBF_D2)</span></div>
<div class="line"><a id="l00157" name="l00157"></a><span class="lineno">  157</span><span class="preprocessor">#define PWR_FLAG_SB_D1      (0x02U)</span></div>
<div class="line"><a id="l00158" name="l00158"></a><span class="lineno">  158</span><span class="preprocessor">#define PWR_FLAG_SB_D2      (0x03U)</span></div>
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno">  159</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_CPUCR_SBF_D2) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00160" name="l00160"></a><span class="lineno">  160</span><span class="preprocessor">#define PWR_FLAG_SB         (0x04U)</span></div>
<div class="line"><a id="l00161" name="l00161"></a><span class="lineno">  161</span><span class="preprocessor">#if defined (DUAL_CORE)</span></div>
<div class="line"><a id="l00162" name="l00162"></a><span class="lineno">  162</span><span class="preprocessor">#define PWR_FLAG_CPU_HOLD   (0x05U)</span></div>
<div class="line"><a id="l00163" name="l00163"></a><span class="lineno">  163</span><span class="preprocessor">#define PWR_FLAG_CPU2_HOLD  (0x06U)</span></div>
<div class="line"><a id="l00164" name="l00164"></a><span class="lineno">  164</span><span class="preprocessor">#define PWR_FLAG2_STOP      (0x07U)</span></div>
<div class="line"><a id="l00165" name="l00165"></a><span class="lineno">  165</span><span class="preprocessor">#define PWR_FLAG2_SB_D1     (0x08U)</span></div>
<div class="line"><a id="l00166" name="l00166"></a><span class="lineno">  166</span><span class="preprocessor">#define PWR_FLAG2_SB_D2     (0x09U)</span></div>
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno">  167</span><span class="preprocessor">#define PWR_FLAG2_SB        (0x0AU)</span></div>
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno">  168</span><span class="preprocessor">#endif </span><span class="comment">/* defined (DUAL_CORE) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00169" name="l00169"></a><span class="lineno">  169</span><span class="preprocessor">#define PWR_FLAG_PVDO       (0x0BU)</span></div>
<div class="line"><a id="l00170" name="l00170"></a><span class="lineno">  170</span><span class="preprocessor">#define PWR_FLAG_AVDO       (0x0CU)</span></div>
<div class="line"><a id="l00171" name="l00171"></a><span class="lineno">  171</span><span class="preprocessor">#define PWR_FLAG_ACTVOSRDY  (0x0DU)</span></div>
<div class="line"><a id="l00172" name="l00172"></a><span class="lineno">  172</span><span class="preprocessor">#define PWR_FLAG_ACTVOS     (0x0EU)</span></div>
<div class="line"><a id="l00173" name="l00173"></a><span class="lineno">  173</span><span class="preprocessor">#define PWR_FLAG_BRR        (0x0FU)</span></div>
<div class="line"><a id="l00174" name="l00174"></a><span class="lineno">  174</span><span class="preprocessor">#define PWR_FLAG_VOSRDY     (0x10U)</span></div>
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno">  175</span><span class="preprocessor">#if defined (SMPS)</span></div>
<div class="line"><a id="l00176" name="l00176"></a><span class="lineno">  176</span><span class="preprocessor">#define PWR_FLAG_SMPSEXTRDY (0x11U)</span></div>
<div class="line"><a id="l00177" name="l00177"></a><span class="lineno">  177</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00178" name="l00178"></a><span class="lineno">  178</span><span class="preprocessor">#define PWR_FLAG_SCUEN      (0x11U)</span></div>
<div class="line"><a id="l00179" name="l00179"></a><span class="lineno">  179</span><span class="preprocessor">#endif </span><span class="comment">/* defined (SMPS) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00180" name="l00180"></a><span class="lineno">  180</span><span class="preprocessor">#if defined (PWR_CSR1_MMCVDO)</span></div>
<div class="line"><a id="l00181" name="l00181"></a><span class="lineno">  181</span><span class="preprocessor">#define PWR_FLAG_MMCVDO     (0x12U)</span></div>
<div class="line"><a id="l00182" name="l00182"></a><span class="lineno">  182</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_CSR1_MMCVDO) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno">  183</span><span class="preprocessor">#define PWR_FLAG_USB33RDY   (0x13U)</span></div>
<div class="line"><a id="l00184" name="l00184"></a><span class="lineno">  184</span><span class="preprocessor">#define PWR_FLAG_TEMPH      (0x14U)</span></div>
<div class="line"><a id="l00185" name="l00185"></a><span class="lineno">  185</span><span class="preprocessor">#define PWR_FLAG_TEMPL      (0x15U)</span></div>
<div class="line"><a id="l00186" name="l00186"></a><span class="lineno">  186</span><span class="preprocessor">#define PWR_FLAG_VBATH      (0x16U)</span></div>
<div class="line"><a id="l00187" name="l00187"></a><span class="lineno">  187</span><span class="preprocessor">#define PWR_FLAG_VBATL      (0x17U)</span></div>
<div class="line"><a id="l00188" name="l00188"></a><span class="lineno">  188</span> </div>
<div class="line"><a id="l00189" name="l00189"></a><span class="lineno">  189</span><span class="comment">/* PWR Wake up flag */</span></div>
<div class="line"><a id="l00190" name="l00190"></a><span class="lineno">  190</span><span class="preprocessor">#define PWR_FLAG_WKUP1 PWR_WKUPCR_WKUPC1</span></div>
<div class="line"><a id="l00191" name="l00191"></a><span class="lineno">  191</span><span class="preprocessor">#define PWR_FLAG_WKUP2 PWR_WKUPCR_WKUPC2</span></div>
<div class="line"><a id="l00192" name="l00192"></a><span class="lineno">  192</span><span class="preprocessor">#define PWR_FLAG_WKUP3 PWR_WKUPCR_WKUPC3</span></div>
<div class="line"><a id="l00193" name="l00193"></a><span class="lineno">  193</span><span class="preprocessor">#define PWR_FLAG_WKUP4 PWR_WKUPCR_WKUPC4</span></div>
<div class="line"><a id="l00194" name="l00194"></a><span class="lineno">  194</span><span class="preprocessor">#define PWR_FLAG_WKUP5 PWR_WKUPCR_WKUPC5</span></div>
<div class="line"><a id="l00195" name="l00195"></a><span class="lineno">  195</span><span class="preprocessor">#define PWR_FLAG_WKUP6 PWR_WKUPCR_WKUPC6</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00199" name="l00199"></a><span class="lineno">  199</span></div>
<div class="line"><a id="l00203" name="l00203"></a><span class="lineno">  203</span><span class="preprocessor">#define  PWR_EWUP_MASK  (0x0FFF3F3FU)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00207" name="l00207"></a><span class="lineno">  207</span></div>
<div class="line"><a id="l00211" name="l00211"></a><span class="lineno">  211</span><span class="comment">/* Exported macro ------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00215" name="l00215"></a><span class="lineno">  215</span></div>
<div class="line"><a id="l00247" name="l00247"></a><span class="lineno">  247</span><span class="preprocessor">#if defined (PWR_SRDCR_VOS) </span><span class="comment">/* STM32H7Axxx and STM32H7Bxxx lines */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00248" name="l00248"></a><span class="lineno">  248</span><span class="preprocessor">#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__)                         \</span></div>
<div class="line"><a id="l00249" name="l00249"></a><span class="lineno">  249</span><span class="preprocessor">do {                                                                           \</span></div>
<div class="line"><a id="l00250" name="l00250"></a><span class="lineno">  250</span><span class="preprocessor">      __IO uint32_t tmpreg = 0x00;                                             \</span></div>
<div class="line"><a id="l00251" name="l00251"></a><span class="lineno">  251</span><span class="preprocessor">      </span><span class="comment">/* Configure the Voltage Scaling */</span><span class="preprocessor">                                      \</span></div>
<div class="line"><a id="l00252" name="l00252"></a><span class="lineno">  252</span><span class="preprocessor">      MODIFY_REG(PWR-&gt;SRDCR, PWR_SRDCR_VOS, (__REGULATOR__));                  \</span></div>
<div class="line"><a id="l00253" name="l00253"></a><span class="lineno">  253</span><span class="preprocessor">      </span><span class="comment">/* Delay after setting the voltage scaling */</span><span class="preprocessor">                            \</span></div>
<div class="line"><a id="l00254" name="l00254"></a><span class="lineno">  254</span><span class="preprocessor">      tmpreg = READ_BIT(PWR-&gt;SRDCR, PWR_SRDCR_VOS);                            \</span></div>
<div class="line"><a id="l00255" name="l00255"></a><span class="lineno">  255</span><span class="preprocessor">      UNUSED(tmpreg);                                                          \</span></div>
<div class="line"><a id="l00256" name="l00256"></a><span class="lineno">  256</span><span class="preprocessor">} while(0)</span></div>
<div class="line"><a id="l00257" name="l00257"></a><span class="lineno">  257</span><span class="preprocessor">#else </span><span class="comment">/* 3 power domains devices */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00258" name="l00258"></a><span class="lineno">  258</span><span class="preprocessor">#if defined(SYSCFG_PWRCR_ODEN) </span><span class="comment">/* STM32H74xxx and STM32H75xxx lines */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00259" name="l00259"></a><span class="lineno">  259</span><span class="preprocessor">#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__)                         \</span></div>
<div class="line"><a id="l00260" name="l00260"></a><span class="lineno">  260</span><span class="preprocessor">do {                                                                           \</span></div>
<div class="line"><a id="l00261" name="l00261"></a><span class="lineno">  261</span><span class="preprocessor">      __IO uint32_t tmpreg = 0x00;                                             \</span></div>
<div class="line"><a id="l00262" name="l00262"></a><span class="lineno">  262</span><span class="preprocessor">      </span><span class="comment">/* Check the voltage scaling to be configured */</span><span class="preprocessor">                         \</span></div>
<div class="line"><a id="l00263" name="l00263"></a><span class="lineno">  263</span><span class="preprocessor">      if((__REGULATOR__) == PWR_REGULATOR_VOLTAGE_SCALE0)                      \</span></div>
<div class="line"><a id="l00264" name="l00264"></a><span class="lineno">  264</span><span class="preprocessor">      {                                                                        \</span></div>
<div class="line"><a id="l00265" name="l00265"></a><span class="lineno">  265</span><span class="preprocessor">        </span><span class="comment">/* Configure the Voltage Scaling 1 */</span><span class="preprocessor">                                  \</span></div>
<div class="line"><a id="l00266" name="l00266"></a><span class="lineno">  266</span><span class="preprocessor">        MODIFY_REG(PWR-&gt;D3CR, PWR_D3CR_VOS, PWR_REGULATOR_VOLTAGE_SCALE1);     \</span></div>
<div class="line"><a id="l00267" name="l00267"></a><span class="lineno">  267</span><span class="preprocessor">        </span><span class="comment">/* Delay after setting the voltage scaling */</span><span class="preprocessor">                          \</span></div>
<div class="line"><a id="l00268" name="l00268"></a><span class="lineno">  268</span><span class="preprocessor">        tmpreg = READ_BIT(PWR-&gt;D3CR, PWR_D3CR_VOS);                            \</span></div>
<div class="line"><a id="l00269" name="l00269"></a><span class="lineno">  269</span><span class="preprocessor">        </span><span class="comment">/* Enable the PWR overdrive */</span><span class="preprocessor">                                         \</span></div>
<div class="line"><a id="l00270" name="l00270"></a><span class="lineno">  270</span><span class="preprocessor">        SET_BIT(SYSCFG-&gt;PWRCR, SYSCFG_PWRCR_ODEN);                             \</span></div>
<div class="line"><a id="l00271" name="l00271"></a><span class="lineno">  271</span><span class="preprocessor">        </span><span class="comment">/* Delay after setting the syscfg boost setting */</span><span class="preprocessor">                     \</span></div>
<div class="line"><a id="l00272" name="l00272"></a><span class="lineno">  272</span><span class="preprocessor">        tmpreg = READ_BIT(SYSCFG-&gt;PWRCR, SYSCFG_PWRCR_ODEN);                   \</span></div>
<div class="line"><a id="l00273" name="l00273"></a><span class="lineno">  273</span><span class="preprocessor">      }                                                                        \</span></div>
<div class="line"><a id="l00274" name="l00274"></a><span class="lineno">  274</span><span class="preprocessor">      else                                                                     \</span></div>
<div class="line"><a id="l00275" name="l00275"></a><span class="lineno">  275</span><span class="preprocessor">      {                                                                        \</span></div>
<div class="line"><a id="l00276" name="l00276"></a><span class="lineno">  276</span><span class="preprocessor">        </span><span class="comment">/* Disable the PWR overdrive */</span><span class="preprocessor">                                        \</span></div>
<div class="line"><a id="l00277" name="l00277"></a><span class="lineno">  277</span><span class="preprocessor">        CLEAR_BIT(SYSCFG-&gt;PWRCR, SYSCFG_PWRCR_ODEN);                           \</span></div>
<div class="line"><a id="l00278" name="l00278"></a><span class="lineno">  278</span><span class="preprocessor">        </span><span class="comment">/* Delay after setting the syscfg boost setting */</span><span class="preprocessor">                     \</span></div>
<div class="line"><a id="l00279" name="l00279"></a><span class="lineno">  279</span><span class="preprocessor">        tmpreg = READ_BIT(SYSCFG-&gt;PWRCR, SYSCFG_PWRCR_ODEN);                   \</span></div>
<div class="line"><a id="l00280" name="l00280"></a><span class="lineno">  280</span><span class="preprocessor">        </span><span class="comment">/* Configure the Voltage Scaling x */</span><span class="preprocessor">                                  \</span></div>
<div class="line"><a id="l00281" name="l00281"></a><span class="lineno">  281</span><span class="preprocessor">        MODIFY_REG(PWR-&gt;D3CR, PWR_D3CR_VOS, (__REGULATOR__));                  \</span></div>
<div class="line"><a id="l00282" name="l00282"></a><span class="lineno">  282</span><span class="preprocessor">        </span><span class="comment">/* Delay after setting the voltage scaling */</span><span class="preprocessor">                          \</span></div>
<div class="line"><a id="l00283" name="l00283"></a><span class="lineno">  283</span><span class="preprocessor">        tmpreg = READ_BIT(PWR-&gt;D3CR, PWR_D3CR_VOS);                            \</span></div>
<div class="line"><a id="l00284" name="l00284"></a><span class="lineno">  284</span><span class="preprocessor">      }                                                                        \</span></div>
<div class="line"><a id="l00285" name="l00285"></a><span class="lineno">  285</span><span class="preprocessor">      UNUSED(tmpreg);                                                          \</span></div>
<div class="line"><a id="l00286" name="l00286"></a><span class="lineno">  286</span><span class="preprocessor">} while(0)</span></div>
<div class="line"><a id="l00287" name="l00287"></a><span class="lineno">  287</span><span class="preprocessor">#else </span><span class="comment">/* STM32H72xxx and STM32H73xxx lines */</span><span class="preprocessor"></span></div>
<div class="foldopen" id="foldopen00288" data-start="" data-end="">
<div class="line"><a id="l00288" name="l00288"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga1ee778f7ff494723bd0ef04ec44b0f77">  288</a></span><span class="preprocessor">#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__)                         \</span></div>
<div class="line"><a id="l00289" name="l00289"></a><span class="lineno">  289</span><span class="preprocessor">do {                                                                           \</span></div>
<div class="line"><a id="l00290" name="l00290"></a><span class="lineno">  290</span><span class="preprocessor">      __IO uint32_t tmpreg = 0x00;                                             \</span></div>
<div class="line"><a id="l00291" name="l00291"></a><span class="lineno">  291</span><span class="preprocessor">      </span><span class="comment">/* Configure the Voltage Scaling */</span><span class="preprocessor">                                      \</span></div>
<div class="line"><a id="l00292" name="l00292"></a><span class="lineno">  292</span><span class="preprocessor">      MODIFY_REG (PWR-&gt;D3CR, PWR_D3CR_VOS, (__REGULATOR__));                   \</span></div>
<div class="line"><a id="l00293" name="l00293"></a><span class="lineno">  293</span><span class="preprocessor">      </span><span class="comment">/* Delay after setting the voltage scaling */</span><span class="preprocessor">                            \</span></div>
<div class="line"><a id="l00294" name="l00294"></a><span class="lineno">  294</span><span class="preprocessor">      tmpreg = READ_BIT(PWR-&gt;D3CR, PWR_D3CR_VOS);                              \</span></div>
<div class="line"><a id="l00295" name="l00295"></a><span class="lineno">  295</span><span class="preprocessor">      UNUSED(tmpreg);                                                          \</span></div>
<div class="line"><a id="l00296" name="l00296"></a><span class="lineno">  296</span><span class="preprocessor">} while(0)</span></div>
</div>
<div class="line"><a id="l00297" name="l00297"></a><span class="lineno">  297</span><span class="preprocessor">#endif </span><span class="comment">/* defined(SYSCFG_PWRCR_ODEN) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00298" name="l00298"></a><span class="lineno">  298</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_SRDCR_VOS) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00299" name="l00299"></a><span class="lineno">  299</span></div>
<div class="line"><a id="l00377" name="l00377"></a><span class="lineno">  377</span><span class="preprocessor">#if defined (DUAL_CORE) </span><span class="comment">/* Dual core lines */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00378" name="l00378"></a><span class="lineno">  378</span><span class="preprocessor">#define __HAL_PWR_GET_FLAG(__FLAG__)                                                              \</span></div>
<div class="line"><a id="l00379" name="l00379"></a><span class="lineno">  379</span><span class="preprocessor">(((__FLAG__) == PWR_FLAG_PVDO)       ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_PVDO)       == PWR_CSR1_PVDO)      :\</span></div>
<div class="line"><a id="l00380" name="l00380"></a><span class="lineno">  380</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_AVDO)       ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_AVDO)       == PWR_CSR1_AVDO)      :\</span></div>
<div class="line"><a id="l00381" name="l00381"></a><span class="lineno">  381</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_ACTVOSRDY)  ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_ACTVOSRDY)  == PWR_CSR1_ACTVOSRDY) :\</span></div>
<div class="line"><a id="l00382" name="l00382"></a><span class="lineno">  382</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_VOSRDY)     ? ((PWR-&gt;D3CR &amp; PWR_D3CR_VOSRDY)     == PWR_D3CR_VOSRDY)    :\</span></div>
<div class="line"><a id="l00383" name="l00383"></a><span class="lineno">  383</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SMPSEXTRDY) ? ((PWR-&gt;CR3 &amp; PWR_CR3_SMPSEXTRDY)   == PWR_CR3_SMPSEXTRDY) :\</span></div>
<div class="line"><a id="l00384" name="l00384"></a><span class="lineno">  384</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_BRR)        ? ((PWR-&gt;CR2 &amp; PWR_CR2_BRRDY)        == PWR_CR2_BRRDY)      :\</span></div>
<div class="line"><a id="l00385" name="l00385"></a><span class="lineno">  385</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_CPU_HOLD)   ? ((PWR-&gt;CPU2CR &amp; PWR_CPU2CR_HOLD1F) == PWR_CPU2CR_HOLD1F)  :\</span></div>
<div class="line"><a id="l00386" name="l00386"></a><span class="lineno">  386</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_CPU2_HOLD)  ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_HOLD2F)   == PWR_CPUCR_HOLD2F)   :\</span></div>
<div class="line"><a id="l00387" name="l00387"></a><span class="lineno">  387</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SB)         ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_SBF)      == PWR_CPUCR_SBF)      :\</span></div>
<div class="line"><a id="l00388" name="l00388"></a><span class="lineno">  388</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG2_SB)        ? ((PWR-&gt;CPU2CR &amp; PWR_CPU2CR_SBF)    == PWR_CPU2CR_SBF)     :\</span></div>
<div class="line"><a id="l00389" name="l00389"></a><span class="lineno">  389</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_STOP)       ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_STOPF)    == PWR_CPUCR_STOPF)    :\</span></div>
<div class="line"><a id="l00390" name="l00390"></a><span class="lineno">  390</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG2_STOP)      ? ((PWR-&gt;CPU2CR &amp; PWR_CPU2CR_STOPF)  == PWR_CPU2CR_STOPF)   :\</span></div>
<div class="line"><a id="l00391" name="l00391"></a><span class="lineno">  391</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SB_D1)      ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_SBF_D1)   == PWR_CPUCR_SBF_D1)   :\</span></div>
<div class="line"><a id="l00392" name="l00392"></a><span class="lineno">  392</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG2_SB_D1)     ? ((PWR-&gt;CPU2CR &amp; PWR_CPU2CR_SBF_D1) == PWR_CPU2CR_SBF_D1)  :\</span></div>
<div class="line"><a id="l00393" name="l00393"></a><span class="lineno">  393</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SB_D2)      ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_SBF_D2)   == PWR_CPUCR_SBF_D2)   :\</span></div>
<div class="line"><a id="l00394" name="l00394"></a><span class="lineno">  394</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG2_SB_D2)     ? ((PWR-&gt;CPU2CR &amp; PWR_CPU2CR_SBF_D2) == PWR_CPU2CR_SBF_D2)  :\</span></div>
<div class="line"><a id="l00395" name="l00395"></a><span class="lineno">  395</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_USB33RDY)   ? ((PWR-&gt;CR3 &amp; PWR_CR3_USB33RDY)     == PWR_CR3_USB33RDY)   :\</span></div>
<div class="line"><a id="l00396" name="l00396"></a><span class="lineno">  396</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_TEMPH)      ? ((PWR-&gt;CR2 &amp; PWR_CR2_TEMPH)        == PWR_CR2_TEMPH)      :\</span></div>
<div class="line"><a id="l00397" name="l00397"></a><span class="lineno">  397</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_TEMPL)      ? ((PWR-&gt;CR2 &amp; PWR_CR2_TEMPL)        == PWR_CR2_TEMPL)      :\</span></div>
<div class="line"><a id="l00398" name="l00398"></a><span class="lineno">  398</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_VBATH)      ? ((PWR-&gt;CR2 &amp; PWR_CR2_VBATH)        == PWR_CR2_VBATH)      :\</span></div>
<div class="line"><a id="l00399" name="l00399"></a><span class="lineno">  399</span><span class="preprocessor"> ((PWR-&gt;CR2 &amp; PWR_CR2_VBATL) == PWR_CR2_VBATL))</span></div>
<div class="line"><a id="l00400" name="l00400"></a><span class="lineno">  400</span><span class="preprocessor">#else </span><span class="comment">/* Single core lines */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00401" name="l00401"></a><span class="lineno">  401</span><span class="preprocessor">#if defined (PWR_CPUCR_SBF_D2) </span><span class="comment">/* STM32H72x, STM32H73x, STM32H74x and STM32H75x lines */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00402" name="l00402"></a><span class="lineno">  402</span><span class="preprocessor">#if defined (SMPS) </span><span class="comment">/* STM32H725 and STM32H735 lines */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00403" name="l00403"></a><span class="lineno">  403</span><span class="preprocessor">#define __HAL_PWR_GET_FLAG(__FLAG__)                                                              \</span></div>
<div class="line"><a id="l00404" name="l00404"></a><span class="lineno">  404</span><span class="preprocessor">(((__FLAG__) == PWR_FLAG_PVDO)       ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_PVDO)      == PWR_CSR1_PVDO)       :\</span></div>
<div class="line"><a id="l00405" name="l00405"></a><span class="lineno">  405</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_AVDO)       ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_AVDO)      == PWR_CSR1_AVDO)       :\</span></div>
<div class="line"><a id="l00406" name="l00406"></a><span class="lineno">  406</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_ACTVOSRDY)  ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_ACTVOSRDY) == PWR_CSR1_ACTVOSRDY)  :\</span></div>
<div class="line"><a id="l00407" name="l00407"></a><span class="lineno">  407</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_VOSRDY)     ? ((PWR-&gt;D3CR &amp; PWR_D3CR_VOSRDY)    == PWR_D3CR_VOSRDY)     :\</span></div>
<div class="line"><a id="l00408" name="l00408"></a><span class="lineno">  408</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SMPSEXTRDY) ? ((PWR-&gt;CR3 &amp; PWR_FLAG_SMPSEXTRDY) == PWR_FLAG_SMPSEXTRDY) :\</span></div>
<div class="line"><a id="l00409" name="l00409"></a><span class="lineno">  409</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_BRR)        ? ((PWR-&gt;CR2 &amp; PWR_CR2_BRRDY)       == PWR_CR2_BRRDY)       :\</span></div>
<div class="line"><a id="l00410" name="l00410"></a><span class="lineno">  410</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SB)         ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_SBF)     == PWR_CPUCR_SBF)       :\</span></div>
<div class="line"><a id="l00411" name="l00411"></a><span class="lineno">  411</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_STOP)       ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_STOPF)   == PWR_CPUCR_STOPF)     :\</span></div>
<div class="line"><a id="l00412" name="l00412"></a><span class="lineno">  412</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SB_D1)      ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_SBF_D1)  == PWR_CPUCR_SBF_D1)    :\</span></div>
<div class="line"><a id="l00413" name="l00413"></a><span class="lineno">  413</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SB_D2)      ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_SBF_D2)  == PWR_CPUCR_SBF_D2)    :\</span></div>
<div class="line"><a id="l00414" name="l00414"></a><span class="lineno">  414</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_USB33RDY)   ? ((PWR-&gt;CR3 &amp; PWR_CR3_USB33RDY)    == PWR_CR3_USB33RDY)    :\</span></div>
<div class="line"><a id="l00415" name="l00415"></a><span class="lineno">  415</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_TEMPH)      ? ((PWR-&gt;CR2 &amp; PWR_CR2_TEMPH)       == PWR_CR2_TEMPH)       :\</span></div>
<div class="line"><a id="l00416" name="l00416"></a><span class="lineno">  416</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_TEMPL)      ? ((PWR-&gt;CR2 &amp; PWR_CR2_TEMPL)       == PWR_CR2_TEMPL)       :\</span></div>
<div class="line"><a id="l00417" name="l00417"></a><span class="lineno">  417</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_VBATH)      ? ((PWR-&gt;CR2 &amp; PWR_CR2_VBATH)       == PWR_CR2_VBATH)       :\</span></div>
<div class="line"><a id="l00418" name="l00418"></a><span class="lineno">  418</span><span class="preprocessor"> ((PWR-&gt;CR2 &amp; PWR_CR2_VBATL) == PWR_CR2_VBATL))</span></div>
<div class="line"><a id="l00419" name="l00419"></a><span class="lineno">  419</span><span class="preprocessor">#else </span><span class="comment">/* STM32H723, STM32H733, STM32H742, STM32H743, STM32H750 and STM32H753 lines */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00420" name="l00420"></a><span class="lineno">  420</span><span class="preprocessor">#define __HAL_PWR_GET_FLAG(__FLAG__)                                                            \</span></div>
<div class="line"><a id="l00421" name="l00421"></a><span class="lineno">  421</span><span class="preprocessor">(((__FLAG__) == PWR_FLAG_PVDO)      ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_PVDO)      == PWR_CSR1_PVDO)      :\</span></div>
<div class="line"><a id="l00422" name="l00422"></a><span class="lineno">  422</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_AVDO)      ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_AVDO)      == PWR_CSR1_AVDO)      :\</span></div>
<div class="line"><a id="l00423" name="l00423"></a><span class="lineno">  423</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_ACTVOSRDY) ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_ACTVOSRDY) == PWR_CSR1_ACTVOSRDY) :\</span></div>
<div class="line"><a id="l00424" name="l00424"></a><span class="lineno">  424</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_VOSRDY)    ? ((PWR-&gt;D3CR &amp; PWR_D3CR_VOSRDY)    == PWR_D3CR_VOSRDY)    :\</span></div>
<div class="line"><a id="l00425" name="l00425"></a><span class="lineno">  425</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SCUEN)     ? ((PWR-&gt;CR3 &amp; PWR_CR3_SCUEN)       == PWR_CR3_SCUEN)      :\</span></div>
<div class="line"><a id="l00426" name="l00426"></a><span class="lineno">  426</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_BRR)       ? ((PWR-&gt;CR2 &amp; PWR_CR2_BRRDY)       == PWR_CR2_BRRDY)      :\</span></div>
<div class="line"><a id="l00427" name="l00427"></a><span class="lineno">  427</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SB)        ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_SBF)     == PWR_CPUCR_SBF)      :\</span></div>
<div class="line"><a id="l00428" name="l00428"></a><span class="lineno">  428</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_STOP)      ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_STOPF)   == PWR_CPUCR_STOPF)    :\</span></div>
<div class="line"><a id="l00429" name="l00429"></a><span class="lineno">  429</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SB_D1)     ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_SBF_D1)  == PWR_CPUCR_SBF_D1)   :\</span></div>
<div class="line"><a id="l00430" name="l00430"></a><span class="lineno">  430</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SB_D2)     ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_SBF_D2)  == PWR_CPUCR_SBF_D2)   :\</span></div>
<div class="line"><a id="l00431" name="l00431"></a><span class="lineno">  431</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_USB33RDY)  ? ((PWR-&gt;CR3 &amp; PWR_CR3_USB33RDY)    == PWR_CR3_USB33RDY)   :\</span></div>
<div class="line"><a id="l00432" name="l00432"></a><span class="lineno">  432</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_TEMPH)     ? ((PWR-&gt;CR2 &amp; PWR_CR2_TEMPH)       == PWR_CR2_TEMPH)      :\</span></div>
<div class="line"><a id="l00433" name="l00433"></a><span class="lineno">  433</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_TEMPL)     ? ((PWR-&gt;CR2 &amp; PWR_CR2_TEMPL)       == PWR_CR2_TEMPL)      :\</span></div>
<div class="line"><a id="l00434" name="l00434"></a><span class="lineno">  434</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_VBATH)     ? ((PWR-&gt;CR2 &amp; PWR_CR2_VBATH)       == PWR_CR2_VBATH)      :\</span></div>
<div class="line"><a id="l00435" name="l00435"></a><span class="lineno">  435</span><span class="preprocessor"> ((PWR-&gt;CR2 &amp; PWR_CR2_VBATL) == PWR_CR2_VBATL))</span></div>
<div class="line"><a id="l00436" name="l00436"></a><span class="lineno">  436</span><span class="preprocessor">#endif </span><span class="comment">/* defined (SMPS) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00437" name="l00437"></a><span class="lineno">  437</span><span class="preprocessor">#else </span><span class="comment">/* STM32H7Axxx and STM32H7Bxxx lines */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00438" name="l00438"></a><span class="lineno">  438</span><span class="preprocessor">#if defined (SMPS) </span><span class="comment">/* STM32H7AxxQ and STM32H7BxxQ lines */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00439" name="l00439"></a><span class="lineno">  439</span><span class="preprocessor">#define __HAL_PWR_GET_FLAG(__FLAG__)                                                             \</span></div>
<div class="line"><a id="l00440" name="l00440"></a><span class="lineno">  440</span><span class="preprocessor">(((__FLAG__) == PWR_FLAG_PVDO)       ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_PVDO)      == PWR_CSR1_PVDO)      :\</span></div>
<div class="line"><a id="l00441" name="l00441"></a><span class="lineno">  441</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_AVDO)       ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_AVDO)      == PWR_CSR1_AVDO)      :\</span></div>
<div class="line"><a id="l00442" name="l00442"></a><span class="lineno">  442</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_ACTVOSRDY)  ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_ACTVOSRDY) == PWR_CSR1_ACTVOSRDY) :\</span></div>
<div class="line"><a id="l00443" name="l00443"></a><span class="lineno">  443</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_BRR)        ? ((PWR-&gt;CR2 &amp; PWR_CR2_BRRDY)       == PWR_CR2_BRRDY)      :\</span></div>
<div class="line"><a id="l00444" name="l00444"></a><span class="lineno">  444</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_VOSRDY)     ? ((PWR-&gt;SRDCR &amp; PWR_SRDCR_VOSRDY)  == PWR_SRDCR_VOSRDY)   :\</span></div>
<div class="line"><a id="l00445" name="l00445"></a><span class="lineno">  445</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_STOP)       ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_STOPF)   == PWR_CPUCR_STOPF)    :\</span></div>
<div class="line"><a id="l00446" name="l00446"></a><span class="lineno">  446</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SB)         ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_SBF)     == PWR_CPUCR_SBF)      :\</span></div>
<div class="line"><a id="l00447" name="l00447"></a><span class="lineno">  447</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_MMCVDO)     ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_MMCVDO)    == PWR_CSR1_MMCVDO)    :\</span></div>
<div class="line"><a id="l00448" name="l00448"></a><span class="lineno">  448</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SMPSEXTRDY) ? ((PWR-&gt;CR3 &amp; PWR_CR3_SMPSEXTRDY)  == PWR_CR3_SMPSEXTRDY) :\</span></div>
<div class="line"><a id="l00449" name="l00449"></a><span class="lineno">  449</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_USB33RDY)   ? ((PWR-&gt;CR3 &amp; PWR_CR3_USB33RDY)    == PWR_CR3_USB33RDY)   :\</span></div>
<div class="line"><a id="l00450" name="l00450"></a><span class="lineno">  450</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_TEMPH)      ? ((PWR-&gt;CR2 &amp; PWR_CR2_TEMPH)       == PWR_CR2_TEMPH)      :\</span></div>
<div class="line"><a id="l00451" name="l00451"></a><span class="lineno">  451</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_TEMPL)      ? ((PWR-&gt;CR2 &amp; PWR_CR2_TEMPL)       == PWR_CR2_TEMPL)      :\</span></div>
<div class="line"><a id="l00452" name="l00452"></a><span class="lineno">  452</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_VBATH)      ? ((PWR-&gt;CR2 &amp; PWR_CR2_VBATH)       == PWR_CR2_VBATH)      :\</span></div>
<div class="line"><a id="l00453" name="l00453"></a><span class="lineno">  453</span><span class="preprocessor"> ((PWR-&gt;CR2 &amp; PWR_CR2_VBATL) == PWR_CR2_VBATL))</span></div>
<div class="line"><a id="l00454" name="l00454"></a><span class="lineno">  454</span><span class="preprocessor">#else </span><span class="comment">/* STM32H7Axx and STM32H7Bxx lines */</span><span class="preprocessor"></span></div>
<div class="foldopen" id="foldopen00455" data-start="" data-end="">
<div class="line"><a id="l00455" name="l00455"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga2977135bbea35b786805eea640d1c884">  455</a></span><span class="preprocessor">#define __HAL_PWR_GET_FLAG(__FLAG__)                                                            \</span></div>
<div class="line"><a id="l00456" name="l00456"></a><span class="lineno">  456</span><span class="preprocessor">(((__FLAG__) == PWR_FLAG_PVDO)      ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_PVDO)      == PWR_CSR1_PVDO)      :\</span></div>
<div class="line"><a id="l00457" name="l00457"></a><span class="lineno">  457</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_AVDO)      ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_AVDO)      == PWR_CSR1_AVDO)      :\</span></div>
<div class="line"><a id="l00458" name="l00458"></a><span class="lineno">  458</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_ACTVOSRDY) ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_ACTVOSRDY) == PWR_CSR1_ACTVOSRDY) :\</span></div>
<div class="line"><a id="l00459" name="l00459"></a><span class="lineno">  459</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_BRR)       ? ((PWR-&gt;CR2 &amp; PWR_CR2_BRRDY)       == PWR_CR2_BRRDY)      :\</span></div>
<div class="line"><a id="l00460" name="l00460"></a><span class="lineno">  460</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_VOSRDY)    ? ((PWR-&gt;SRDCR &amp; PWR_SRDCR_VOSRDY)  == PWR_SRDCR_VOSRDY)   :\</span></div>
<div class="line"><a id="l00461" name="l00461"></a><span class="lineno">  461</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SCUEN)     ? ((PWR-&gt;CR3 &amp; PWR_CR3_SCUEN)       == PWR_CR3_SCUEN)      :\</span></div>
<div class="line"><a id="l00462" name="l00462"></a><span class="lineno">  462</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_STOP)      ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_STOPF)   == PWR_CPUCR_STOPF)    :\</span></div>
<div class="line"><a id="l00463" name="l00463"></a><span class="lineno">  463</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_SB)        ? ((PWR-&gt;CPUCR &amp; PWR_CPUCR_SBF)     == PWR_CPUCR_SBF)      :\</span></div>
<div class="line"><a id="l00464" name="l00464"></a><span class="lineno">  464</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_MMCVDO)    ? ((PWR-&gt;CSR1 &amp; PWR_CSR1_MMCVDO)    == PWR_CSR1_MMCVDO)    :\</span></div>
<div class="line"><a id="l00465" name="l00465"></a><span class="lineno">  465</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_USB33RDY)  ? ((PWR-&gt;CR3 &amp; PWR_CR3_USB33RDY)    == PWR_CR3_USB33RDY)   :\</span></div>
<div class="line"><a id="l00466" name="l00466"></a><span class="lineno">  466</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_TEMPH)     ? ((PWR-&gt;CR2 &amp; PWR_CR2_TEMPH)       == PWR_CR2_TEMPH)      :\</span></div>
<div class="line"><a id="l00467" name="l00467"></a><span class="lineno">  467</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_TEMPL)     ? ((PWR-&gt;CR2 &amp; PWR_CR2_TEMPL)       == PWR_CR2_TEMPL)      :\</span></div>
<div class="line"><a id="l00468" name="l00468"></a><span class="lineno">  468</span><span class="preprocessor"> ((__FLAG__) == PWR_FLAG_VBATH)     ? ((PWR-&gt;CR2 &amp; PWR_CR2_VBATH)       == PWR_CR2_VBATH)      :\</span></div>
<div class="line"><a id="l00469" name="l00469"></a><span class="lineno">  469</span><span class="preprocessor"> ((PWR-&gt;CR2 &amp; PWR_CR2_VBATL) == PWR_CR2_VBATL))</span></div>
</div>
<div class="line"><a id="l00470" name="l00470"></a><span class="lineno">  470</span><span class="preprocessor">#endif </span><span class="comment">/* SMPS */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00471" name="l00471"></a><span class="lineno">  471</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_SBF_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00472" name="l00472"></a><span class="lineno">  472</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00473" name="l00473"></a><span class="lineno">  473</span></div>
<div class="line"><a id="l00487" name="l00487"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga8e3eb6bbc85beee17d213d64e99e8eed">  487</a></span><span class="preprocessor">#define __HAL_PWR_GET_WAKEUPFLAG(__FLAG__) ((PWR-&gt;WKUPFR &amp; (__FLAG__)) ? 0 : 1)</span></div>
<div class="line"><a id="l00488" name="l00488"></a><span class="lineno">  488</span> </div>
<div class="line"><a id="l00489" name="l00489"></a><span class="lineno">  489</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00500" name="l00500"></a><span class="lineno">  500</span><span class="preprocessor">#define __HAL_PWR_CLEAR_FLAG(__FLAG__)      \</span></div>
<div class="line"><a id="l00501" name="l00501"></a><span class="lineno">  501</span><span class="preprocessor">do {                                        \</span></div>
<div class="line"><a id="l00502" name="l00502"></a><span class="lineno">  502</span><span class="preprocessor">     SET_BIT(PWR-&gt;CPUCR, PWR_CPUCR_CSSF);   \</span></div>
<div class="line"><a id="l00503" name="l00503"></a><span class="lineno">  503</span><span class="preprocessor">     SET_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_CSSF); \</span></div>
<div class="line"><a id="l00504" name="l00504"></a><span class="lineno">  504</span><span class="preprocessor">} while(0)</span></div>
<div class="line"><a id="l00505" name="l00505"></a><span class="lineno">  505</span><span class="preprocessor">#else</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00516" name="l00516"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga96f24bf4b16c9f944cd829100bf746e5">  516</a></span><span class="preprocessor">#define __HAL_PWR_CLEAR_FLAG(__FLAG__) SET_BIT(PWR-&gt;CPUCR, PWR_CPUCR_CSSF)</span></div>
<div class="line"><a id="l00517" name="l00517"></a><span class="lineno">  517</span><span class="preprocessor">#endif </span><span class="comment">/* defined (DUAL_CORE) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00518" name="l00518"></a><span class="lineno">  518</span></div>
<div class="line"><a id="l00532" name="l00532"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga21189c3a699027e3e932dff6985b2516">  532</a></span><span class="preprocessor">#define __HAL_PWR_CLEAR_WAKEUPFLAG(__FLAG__) SET_BIT(PWR-&gt;WKUPCR, (__FLAG__))</span></div>
<div class="line"><a id="l00533" name="l00533"></a><span class="lineno">  533</span></div>
<div class="line"><a id="l00538" name="l00538"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga3180f039cf14ef78a64089f387f8f9c2">  538</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI-&gt;IMR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00539" name="l00539"></a><span class="lineno">  539</span> </div>
<div class="line"><a id="l00540" name="l00540"></a><span class="lineno">  540</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00545" name="l00545"></a><span class="lineno">  545</span><span class="preprocessor">#define __HAL_PWR_PVD_EXTID2_ENABLE_IT() SET_BIT(EXTI_D2-&gt;IMR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00546" name="l00546"></a><span class="lineno">  546</span><span class="preprocessor">#endif </span><span class="comment">/* defined (DUAL_CORE) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00547" name="l00547"></a><span class="lineno">  547</span></div>
<div class="line"><a id="l00552" name="l00552"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#gad240d7bf8f15191b068497b9aead1f1f">  552</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI-&gt;IMR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00553" name="l00553"></a><span class="lineno">  553</span> </div>
<div class="line"><a id="l00554" name="l00554"></a><span class="lineno">  554</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00559" name="l00559"></a><span class="lineno">  559</span><span class="preprocessor">#define __HAL_PWR_PVD_EXTID2_DISABLE_IT() CLEAR_BIT(EXTI_D2-&gt;IMR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00560" name="l00560"></a><span class="lineno">  560</span><span class="preprocessor">#endif </span><span class="comment">/* defined (DUAL_CORE) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00561" name="l00561"></a><span class="lineno">  561</span></div>
<div class="line"><a id="l00566" name="l00566"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#gae5ba5672fe8cb7c1686c7f2cc211b128">  566</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI-&gt;EMR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00567" name="l00567"></a><span class="lineno">  567</span> </div>
<div class="line"><a id="l00568" name="l00568"></a><span class="lineno">  568</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00573" name="l00573"></a><span class="lineno">  573</span><span class="preprocessor">#define __HAL_PWR_PVD_EXTID2_ENABLE_EVENT() SET_BIT(EXTI_D2-&gt;EMR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00574" name="l00574"></a><span class="lineno">  574</span><span class="preprocessor">#endif </span><span class="comment">/* defined (DUAL_CORE) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00575" name="l00575"></a><span class="lineno">  575</span></div>
<div class="line"><a id="l00580" name="l00580"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga8bd379e960497722450c7cea474a7e7a">  580</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI-&gt;EMR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00581" name="l00581"></a><span class="lineno">  581</span> </div>
<div class="line"><a id="l00582" name="l00582"></a><span class="lineno">  582</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00587" name="l00587"></a><span class="lineno">  587</span><span class="preprocessor">#define __HAL_PWR_PVD_EXTID2_DISABLE_EVENT() CLEAR_BIT(EXTI_D2-&gt;EMR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00588" name="l00588"></a><span class="lineno">  588</span><span class="preprocessor">#endif </span><span class="comment">/* defined (DUAL_CORE) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00589" name="l00589"></a><span class="lineno">  589</span></div>
<div class="line"><a id="l00594" name="l00594"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga7bef3f30c9fe267c99d5240fbf3f878c">  594</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI-&gt;RTSR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00595" name="l00595"></a><span class="lineno">  595</span></div>
<div class="line"><a id="l00600" name="l00600"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga1ca8fd7f3286a176f6be540c75a004c6">  600</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI-&gt;RTSR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00601" name="l00601"></a><span class="lineno">  601</span></div>
<div class="line"><a id="l00606" name="l00606"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga5b971478563a00e1ee1a9d8ca8054e08">  606</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI-&gt;FTSR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00607" name="l00607"></a><span class="lineno">  607</span></div>
<div class="line"><a id="l00612" name="l00612"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga1ca57168205f8cd8d1014e6eb9465f2d">  612</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI-&gt;FTSR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00613" name="l00613"></a><span class="lineno">  613</span></div>
<div class="foldopen" id="foldopen00618" data-start="" data-end="">
<div class="line"><a id="l00618" name="l00618"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga638033d236eb78c1e5ecb9b49c4e7f36">  618</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \</span></div>
<div class="line"><a id="l00619" name="l00619"></a><span class="lineno">  619</span><span class="preprocessor">do {                                                    \</span></div>
<div class="line"><a id="l00620" name="l00620"></a><span class="lineno">  620</span><span class="preprocessor">      __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();          \</span></div>
<div class="line"><a id="l00621" name="l00621"></a><span class="lineno">  621</span><span class="preprocessor">      __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();         \</span></div>
<div class="line"><a id="l00622" name="l00622"></a><span class="lineno">  622</span><span class="preprocessor">} while(0);</span></div>
</div>
<div class="line"><a id="l00623" name="l00623"></a><span class="lineno">  623</span></div>
<div class="foldopen" id="foldopen00628" data-start="" data-end="">
<div class="line"><a id="l00628" name="l00628"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga3f66c9c0c214cd08c24674904dcdc4e0">  628</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \</span></div>
<div class="line"><a id="l00629" name="l00629"></a><span class="lineno">  629</span><span class="preprocessor">do {                                                     \</span></div>
<div class="line"><a id="l00630" name="l00630"></a><span class="lineno">  630</span><span class="preprocessor">      __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();          \</span></div>
<div class="line"><a id="l00631" name="l00631"></a><span class="lineno">  631</span><span class="preprocessor">      __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();         \</span></div>
<div class="line"><a id="l00632" name="l00632"></a><span class="lineno">  632</span><span class="preprocessor">} while(0);</span></div>
</div>
<div class="line"><a id="l00633" name="l00633"></a><span class="lineno">  633</span></div>
<div class="line"><a id="l00638" name="l00638"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#ga5e66fa75359b51066e0731ac1e5ae438">  638</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_GET_FLAG() ((READ_BIT(EXTI-&gt;PR1, PWR_EXTI_LINE_PVD) == PWR_EXTI_LINE_PVD) ? 1UL : 0UL)</span></div>
<div class="line"><a id="l00639" name="l00639"></a><span class="lineno">  639</span> </div>
<div class="line"><a id="l00640" name="l00640"></a><span class="lineno">  640</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00645" name="l00645"></a><span class="lineno">  645</span><span class="preprocessor">#define __HAL_PWR_PVD_EXTID2_GET_FLAG() ((READ_BIT(EXTI_D2-&gt;PR1, PWR_EXTI_LINE_PVD) == PWR_EXTI_LINE_PVD) ? 1UL : 0UL)</span></div>
<div class="line"><a id="l00646" name="l00646"></a><span class="lineno">  646</span><span class="preprocessor">#endif </span><span class="comment">/* defined (DUAL_CORE) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00647" name="l00647"></a><span class="lineno">  647</span></div>
<div class="line"><a id="l00652" name="l00652"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#gac0fb2218bc050f5d8fdb1a3f28590352">  652</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() SET_BIT(EXTI-&gt;PR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00653" name="l00653"></a><span class="lineno">  653</span> </div>
<div class="line"><a id="l00654" name="l00654"></a><span class="lineno">  654</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00659" name="l00659"></a><span class="lineno">  659</span><span class="preprocessor">#define __HAL_PWR_PVD_EXTID2_CLEAR_FLAG() SET_BIT(EXTI_D2-&gt;PR1, PWR_EXTI_LINE_PVD)</span></div>
<div class="line"><a id="l00660" name="l00660"></a><span class="lineno">  660</span><span class="preprocessor">#endif </span><span class="comment">/* defined (DUAL_CORE) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00661" name="l00661"></a><span class="lineno">  661</span></div>
<div class="line"><a id="l00666" name="l00666"></a><span class="lineno"><a class="line" href="group___p_w_r___exported___macro.html#gaba4a7968f5c4c4ca6a7047b147ba18d4">  666</a></span><span class="preprocessor">#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI-&gt;SWIER1, PWR_EXTI_LINE_PVD)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00670" name="l00670"></a><span class="lineno">  670</span> </div>
<div class="line"><a id="l00671" name="l00671"></a><span class="lineno">  671</span><span class="comment">/* Include PWR HAL Extension module */</span></div>
<div class="line"><a id="l00672" name="l00672"></a><span class="lineno">  672</span><span class="preprocessor">#include &quot;<a class="code" href="stm32h7xx__hal__pwr__ex_8h.html">stm32h7xx_hal_pwr_ex.h</a>&quot;</span></div>
<div class="line"><a id="l00673" name="l00673"></a><span class="lineno">  673</span> </div>
<div class="line"><a id="l00674" name="l00674"></a><span class="lineno">  674</span><span class="comment">/* Exported functions --------------------------------------------------------*/</span></div>
<div class="line"><a id="l00678" name="l00678"></a><span class="lineno">  678</span></div>
<div class="line"><a id="l00682" name="l00682"></a><span class="lineno">  682</span><span class="comment">/* Initialization and de-initialization functions *****************************/</span></div>
<div class="line"><a id="l00683" name="l00683"></a><span class="lineno">  683</span><span class="keywordtype">void</span> HAL_PWR_DeInit            (<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00684" name="l00684"></a><span class="lineno">  684</span><span class="keywordtype">void</span> HAL_PWR_EnableBkUpAccess  (<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00685" name="l00685"></a><span class="lineno">  685</span><span class="keywordtype">void</span> HAL_PWR_DisableBkUpAccess (<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00689" name="l00689"></a><span class="lineno">  689</span></div>
<div class="line"><a id="l00693" name="l00693"></a><span class="lineno">  693</span><span class="comment">/* Peripheral Control functions  **********************************************/</span></div>
<div class="line"><a id="l00694" name="l00694"></a><span class="lineno">  694</span><span class="comment">/* PVD configuration */</span></div>
<div class="line"><a id="l00695" name="l00695"></a><span class="lineno">  695</span><span class="keywordtype">void</span> HAL_PWR_ConfigPVD  (<span class="keyword">const</span> <a class="code hl_struct" href="struct_p_w_r___p_v_d_type_def.html">PWR_PVDTypeDef</a> *sConfigPVD);</div>
<div class="line"><a id="l00696" name="l00696"></a><span class="lineno">  696</span><span class="keywordtype">void</span> HAL_PWR_EnablePVD  (<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00697" name="l00697"></a><span class="lineno">  697</span><span class="keywordtype">void</span> HAL_PWR_DisablePVD (<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00698" name="l00698"></a><span class="lineno">  698</span> </div>
<div class="line"><a id="l00699" name="l00699"></a><span class="lineno">  699</span><span class="comment">/* WakeUp pins configuration */</span></div>
<div class="line"><a id="l00700" name="l00700"></a><span class="lineno">  700</span><span class="keywordtype">void</span> HAL_PWR_EnableWakeUpPin  (uint32_t WakeUpPinPolarity);</div>
<div class="line"><a id="l00701" name="l00701"></a><span class="lineno">  701</span><span class="keywordtype">void</span> HAL_PWR_DisableWakeUpPin (uint32_t WakeUpPinx);</div>
<div class="line"><a id="l00702" name="l00702"></a><span class="lineno">  702</span> </div>
<div class="line"><a id="l00703" name="l00703"></a><span class="lineno">  703</span><span class="comment">/* Low Power modes entry */</span></div>
<div class="line"><a id="l00704" name="l00704"></a><span class="lineno">  704</span><span class="keywordtype">void</span> HAL_PWR_EnterSTOPMode    (uint32_t Regulator, uint8_t STOPEntry);</div>
<div class="line"><a id="l00705" name="l00705"></a><span class="lineno">  705</span><span class="keywordtype">void</span> HAL_PWR_EnterSLEEPMode   (uint32_t Regulator, uint8_t SLEEPEntry);</div>
<div class="line"><a id="l00706" name="l00706"></a><span class="lineno">  706</span><span class="keywordtype">void</span> HAL_PWR_EnterSTANDBYMode (<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00707" name="l00707"></a><span class="lineno">  707</span> </div>
<div class="line"><a id="l00708" name="l00708"></a><span class="lineno">  708</span><span class="comment">/* Power PVD IRQ Handler */</span></div>
<div class="line"><a id="l00709" name="l00709"></a><span class="lineno">  709</span><span class="keywordtype">void</span> HAL_PWR_PVD_IRQHandler (<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00710" name="l00710"></a><span class="lineno">  710</span><span class="keywordtype">void</span> HAL_PWR_PVDCallback    (<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00711" name="l00711"></a><span class="lineno">  711</span> </div>
<div class="line"><a id="l00712" name="l00712"></a><span class="lineno">  712</span><span class="comment">/* Cortex System Control functions  *******************************************/</span></div>
<div class="line"><a id="l00713" name="l00713"></a><span class="lineno">  713</span><span class="keywordtype">void</span> HAL_PWR_EnableSleepOnExit  (<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00714" name="l00714"></a><span class="lineno">  714</span><span class="keywordtype">void</span> HAL_PWR_DisableSleepOnExit (<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00715" name="l00715"></a><span class="lineno">  715</span><span class="keywordtype">void</span> HAL_PWR_EnableSEVOnPend    (<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00716" name="l00716"></a><span class="lineno">  716</span><span class="keywordtype">void</span> HAL_PWR_DisableSEVOnPend   (<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l00720" name="l00720"></a><span class="lineno">  720</span></div>
<div class="line"><a id="l00724" name="l00724"></a><span class="lineno">  724</span> </div>
<div class="line"><a id="l00725" name="l00725"></a><span class="lineno">  725</span><span class="comment">/* Private types -------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00726" name="l00726"></a><span class="lineno">  726</span><span class="comment">/* Private variables ---------------------------------------------------------*/</span></div>
<div class="line"><a id="l00727" name="l00727"></a><span class="lineno">  727</span><span class="comment">/* Private constants ---------------------------------------------------------*/</span></div>
<div class="line"><a id="l00731" name="l00731"></a><span class="lineno">  731</span></div>
<div class="line"><a id="l00735" name="l00735"></a><span class="lineno"><a class="line" href="group___p_w_r___p_v_d___e_x_t_i___line.html#ga43a49255649e03d2d2b6b12c5c379d2b">  735</a></span><span class="preprocessor">#define PWR_EXTI_LINE_PVD  EXTI_IMR1_IM16 </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00740" name="l00740"></a><span class="lineno">  740</span></div>
<div class="line"><a id="l00744" name="l00744"></a><span class="lineno">  744</span><span class="comment">/* Private macros ------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00748" name="l00748"></a><span class="lineno">  748</span></div>
<div class="line"><a id="l00752" name="l00752"></a><span class="lineno">  752</span><span class="comment">/* Check PVD level parameter */</span></div>
<div class="line"><a id="l00753" name="l00753"></a><span class="lineno">  753</span><span class="preprocessor">#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) ||\</span></div>
<div class="line"><a id="l00754" name="l00754"></a><span class="lineno">  754</span><span class="preprocessor">                                 ((LEVEL) == PWR_PVDLEVEL_1) ||\</span></div>
<div class="line"><a id="l00755" name="l00755"></a><span class="lineno">  755</span><span class="preprocessor">                                 ((LEVEL) == PWR_PVDLEVEL_2) ||\</span></div>
<div class="line"><a id="l00756" name="l00756"></a><span class="lineno">  756</span><span class="preprocessor">                                 ((LEVEL) == PWR_PVDLEVEL_3) ||\</span></div>
<div class="line"><a id="l00757" name="l00757"></a><span class="lineno">  757</span><span class="preprocessor">                                 ((LEVEL) == PWR_PVDLEVEL_4) ||\</span></div>
<div class="line"><a id="l00758" name="l00758"></a><span class="lineno">  758</span><span class="preprocessor">                                 ((LEVEL) == PWR_PVDLEVEL_5) ||\</span></div>
<div class="line"><a id="l00759" name="l00759"></a><span class="lineno">  759</span><span class="preprocessor">                                 ((LEVEL) == PWR_PVDLEVEL_6) ||\</span></div>
<div class="line"><a id="l00760" name="l00760"></a><span class="lineno">  760</span><span class="preprocessor">                                 ((LEVEL) == PWR_PVDLEVEL_7))</span></div>
<div class="line"><a id="l00761" name="l00761"></a><span class="lineno">  761</span> </div>
<div class="line"><a id="l00762" name="l00762"></a><span class="lineno">  762</span><span class="comment">/* Check PVD mode parameter */</span></div>
<div class="line"><a id="l00763" name="l00763"></a><span class="lineno">  763</span><span class="preprocessor">#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)            ||\</span></div>
<div class="line"><a id="l00764" name="l00764"></a><span class="lineno">  764</span><span class="preprocessor">                               ((MODE) == PWR_PVD_MODE_IT_FALLING)           ||\</span></div>
<div class="line"><a id="l00765" name="l00765"></a><span class="lineno">  765</span><span class="preprocessor">                               ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING)    ||\</span></div>
<div class="line"><a id="l00766" name="l00766"></a><span class="lineno">  766</span><span class="preprocessor">                               ((MODE) == PWR_PVD_MODE_EVENT_RISING)         ||\</span></div>
<div class="line"><a id="l00767" name="l00767"></a><span class="lineno">  767</span><span class="preprocessor">                               ((MODE) == PWR_PVD_MODE_EVENT_FALLING)        ||\</span></div>
<div class="line"><a id="l00768" name="l00768"></a><span class="lineno">  768</span><span class="preprocessor">                               ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) ||\</span></div>
<div class="line"><a id="l00769" name="l00769"></a><span class="lineno">  769</span><span class="preprocessor">                               ((MODE) == PWR_PVD_MODE_NORMAL))</span></div>
<div class="line"><a id="l00770" name="l00770"></a><span class="lineno">  770</span> </div>
<div class="line"><a id="l00771" name="l00771"></a><span class="lineno">  771</span><span class="comment">/* Check low power regulator parameter */</span></div>
<div class="line"><a id="l00772" name="l00772"></a><span class="lineno">  772</span><span class="preprocessor">#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON)   ||\</span></div>
<div class="line"><a id="l00773" name="l00773"></a><span class="lineno">  773</span><span class="preprocessor">                                     ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))</span></div>
<div class="line"><a id="l00774" name="l00774"></a><span class="lineno">  774</span> </div>
<div class="line"><a id="l00775" name="l00775"></a><span class="lineno">  775</span><span class="comment">/* Check low power mode entry parameter */</span></div>
<div class="line"><a id="l00776" name="l00776"></a><span class="lineno">  776</span><span class="preprocessor">#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) ||\</span></div>
<div class="line"><a id="l00777" name="l00777"></a><span class="lineno">  777</span><span class="preprocessor">                                   ((ENTRY) == PWR_SLEEPENTRY_WFE))</span></div>
<div class="line"><a id="l00778" name="l00778"></a><span class="lineno">  778</span> </div>
<div class="line"><a id="l00779" name="l00779"></a><span class="lineno">  779</span><span class="comment">/* Check low power mode entry parameter */</span></div>
<div class="line"><a id="l00780" name="l00780"></a><span class="lineno">  780</span><span class="preprocessor">#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) ||\</span></div>
<div class="line"><a id="l00781" name="l00781"></a><span class="lineno">  781</span><span class="preprocessor">                                  ((ENTRY) == PWR_STOPENTRY_WFE))</span></div>
<div class="line"><a id="l00782" name="l00782"></a><span class="lineno">  782</span> </div>
<div class="line"><a id="l00783" name="l00783"></a><span class="lineno">  783</span><span class="comment">/* Check voltage scale level parameter */</span></div>
<div class="line"><a id="l00784" name="l00784"></a><span class="lineno">  784</span><span class="preprocessor">#define IS_PWR_REGULATOR_VOLTAGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE0) || \</span></div>
<div class="line"><a id="l00785" name="l00785"></a><span class="lineno">  785</span><span class="preprocessor">                                           ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \</span></div>
<div class="line"><a id="l00786" name="l00786"></a><span class="lineno">  786</span><span class="preprocessor">                                           ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \</span></div>
<div class="line"><a id="l00787" name="l00787"></a><span class="lineno">  787</span><span class="preprocessor">                                           ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00791" name="l00791"></a><span class="lineno">  791</span></div>
<div class="line"><a id="l00795" name="l00795"></a><span class="lineno">  795</span></div>
<div class="line"><a id="l00799" name="l00799"></a><span class="lineno">  799</span></div>
<div class="line"><a id="l00803" name="l00803"></a><span class="lineno">  803</span> </div>
<div class="line"><a id="l00804" name="l00804"></a><span class="lineno">  804</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00805" name="l00805"></a><span class="lineno">  805</span>}</div>
<div class="line"><a id="l00806" name="l00806"></a><span class="lineno">  806</span><span class="preprocessor">#endif </span><span class="comment">/* __cplusplus */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00807" name="l00807"></a><span class="lineno">  807</span> </div>
<div class="line"><a id="l00808" name="l00808"></a><span class="lineno">  808</span><span class="preprocessor">#endif </span><span class="comment">/* STM32H7xx_HAL_PWR_H */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00809" name="l00809"></a><span class="lineno">  809</span> </div>
<div class="ttc" id="astm32h7xx__hal__def_8h_html"><div class="ttname"><a href="stm32h7xx__hal__def_8h.html">stm32h7xx_hal_def.h</a></div><div class="ttdoc">This file contains HAL common defines, enumeration, macros and structures definitions.</div></div>
<div class="ttc" id="astm32h7xx__hal__pwr__ex_8h_html"><div class="ttname"><a href="stm32h7xx__hal__pwr__ex_8h.html">stm32h7xx_hal_pwr_ex.h</a></div><div class="ttdoc">Header file of PWR HAL Extension module.</div></div>
<div class="ttc" id="astruct_p_w_r___p_v_d_type_def_html"><div class="ttname"><a href="struct_p_w_r___p_v_d_type_def.html">PWR_PVDTypeDef</a></div><div class="ttdoc">PWR PVD configuration structure definition.</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_pwr.h:48</div></div>
<div class="ttc" id="astruct_p_w_r___p_v_d_type_def_html_a540471bc6ac947fd8bc2c87f61d9faab"><div class="ttname"><a href="struct_p_w_r___p_v_d_type_def.html#a540471bc6ac947fd8bc2c87f61d9faab">PWR_PVDTypeDef::PVDLevel</a></div><div class="ttdeci">uint32_t PVDLevel</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_pwr.h:49</div></div>
<div class="ttc" id="astruct_p_w_r___p_v_d_type_def_html_af692d691f0cb5871b319fd371fab34d8"><div class="ttname"><a href="struct_p_w_r___p_v_d_type_def.html#af692d691f0cb5871b319fd371fab34d8">PWR_PVDTypeDef::Mode</a></div><div class="ttdeci">uint32_t Mode</div><div class="ttdef"><b>Definition</b> stm32h7xx_hal_pwr.h:54</div></div>
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